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Mixed Signal Hardware Design Lesson6 - High pass filter

Mochipu , 07-23-2026, 07:14 AM
Hi @Phil , Hi all,
I have problems to understanding, why the cut-off frequency should be 1.4Hz in this circuit. I understod how Phil was calculating it with those to 2.2 MegOhms (R301, R303) in parallel. But I don't understand why we have to take them in parallel. I also tried to simulate it and get only 0.7Hz as cut-off frequency at -3dB. Maybe I did something wrong in the simulation. I rewatched the video as well Phil's Lab #122, but I still not get it.

Could someone explain mewhy the cut-off frequency is here 1.4Hz and not 0.7Hz and what I missing in my simulation circuit? I added the RF filter and the HP filter. The RF filter looks good in the cut-off frequency, but for the HP filter I only get the half of what I should.
, 07-23-2026, 07:23 AM
🤖 In the meantime, here’s a response from the [FEDEVEL AI HW Assistant]().
It helps to find relevant resources for your question, but it may make mistakes as it’s still in early development.

This is the response from the AI Assistant:
The cutoff frequency discrepancy comes from how resistors are combined in the high-pass filter configuration. Let me break this down:

1. **Key Concept**: In a standard RC high-pass filter, the cutoff frequency (f_c) is calculated using:
```
f_c = 1/(2πRC)
```
Where R is the *equivalent resistance seen by the capacitor*.

2. **Parallel Resistors Matter**: When two 2.2MΩ resistors are in parallel (as in your case), their equivalent resistance becomes:
```
R_parallel = (2.2MΩ × 2.2MΩ)/(2.2MΩ + 2.2MΩ) = 1.1MΩ
```
This halves the resistance compared to a single 2.2MΩ resistor.

3. **Why You Get 0.7Hz**:
- If your simulation uses a *single* 2.2MΩ resistor (instead of two in parallel), the cutoff becomes:
```
f_c = 1/(2π × 2.2MΩ × C)
```
This would give exactly half the expected frequency (1.4Hz → 0.7Hz).

4. **Verification Steps**:
- Check if your simulation properly implements the **parallel resistor combination**
- Confirm capacitor value matches the design
- Ensure no unintended DC paths or loading effects exist in your simulation

For a practical example of filter analysis using real measurements, see this demonstration of power supply noise analysis where component interactions affect frequency response: [PCB Decoupling Measurement Example](https://www.youtube.com/watch?v=hZSOhVdzqZk&t=3092)

If you've verified the parallel resistors and still see discrepancies, consider:
- Parasitic capacitances in your simulation model
- Input impedance of subsequent stages loading the filter
- Actual vs. nominal component values

You can continue chatting with the AI Assistant here:
https://fedevel.com/hw-assistant
Skoomadentist , 07-23-2026, 10:46 AM
That 1.4 Hz is a mistake and the real cutoff frequency is 0.7 Hz. The 2.2M resistor on the BNC side has no effect provided the driver is DC coupled (or has a large output capacitor).
Mochipu , 07-24-2026, 07:31 AM
Thanks a lot🙌 . I was already afraid to miss something in the basics of electricity😅
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