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Susano , 04-18-2026, 05:20 AM

How critical it's to worry about impedance discontnuities due to via transitions ?
in a DDR specs rise time specifically the DDR3L how critical it's to worry about those vias ?

in the zett brett "The Advanced Digital Hardware Design" by philip salmony I noticed he is using vias with relatively wide diameter compared to the hole size (0.15 hole size / 0.45mm and 0.6mm diameter)
given that all the fabrication factories I know require 0.1 to 0.15mm annular ring

I'm not sure why would I go for such a wide diameter unless for some reason I'm trying to increase/decrease the via impedance in this case to match my traces ?

not sure if my expectation of the reasoning behind this via sizes is right but also still wondering about the original question

Should I be worried about via impedances at this rise times ? and if not then when does it start to be a problem and what techniques are used to match the via impedance accurately

I noticed the saturn tool has tuning via impedance tab but not sure how accurate this is too given the fact that I heard via impedances need a 3d solver in this case

furthermore to expand on this when should I worry about the created via stubs if I'm transitioning between inner layers leaving some residue length on an 8-12 layer board

Robert Feranec , 04-20-2026, 06:40 AM

I have done some videos on this topic. Simple answer, for DDR3 I would not think too much about via impedance (below 2.5GHz). It's important for higher frequencies e.g. 5GHz and more.

Bigger VIAs are cheaper to make.

If you like, try to ask our HW assistant. I have done a number of videos on these topics, it can help you. Try it here: https://fedevel.com/hw-assistant you can ask for example: "How critical it's to worry about impedance discontnuities due to via transitions ?"