FEDEVEL
Platform forum

Caner , 07-04-2026, 04:32 PM

I successfully completed the first lesson of the Advanced PCB Design course. I did the exercises at the end of the lesson and designed the layout for the module and the motherboard from scratch on my own. The second lesson seemed a bit more complicated; I had never done fanout before. I learned a lot of useful information and wrote it all down in my notebook, but when it came time to apply it, I got a little confused. What should I do about the fanout section, especially the part related to DDR3? Should I move on to the next lesson, or can you recommend any resources that would help me better understand this lesson? For example, the video explains how to do fanout using the capacitors under the processor, or it covers the fanout section for DDR3, but when I try to do it myself, I get confused. There’s an overwhelming amount of information in the video. I’m watching the videos very carefully, but I’m hesitant to move on to the next step to get the most out of this—what do you recommend? By the way, a huge thank you to @Robert Feranec —I didn’t expect to get such helpful information from the course.

, 07-04-2026, 04:33 PM

🤖 In the meantime, here’s a response from the [FEDEVEL AI HW Assistant]().
It helps to find relevant resources for your question, but it may make mistakes as it’s still in early development.

This is the response from the AI Assistant:
Here's my advice based on the course materials and practical experience:

**For DDR3 Fanout Challenges:**
1. **Start with Component Placement**
Always place decoupling capacitors _first_ under the processor/BGA area before routing. These need to be as close as possible to power pins (often within 2-3mm). The video shows how critical capacitors are placed directly under the BGA using precise coordinates ([Example](https://www.youtube.com/watch?v=hmD4EtEF2sQ&t=1544)).

2. **Layer Planning is Key**
DDR3 requires careful layer stackup planning. Use the "escape routing" technique shown in the BGA fanout video:
- Move first 2 BGA rows outward to create routing channels
- Use microvias for dense areas ([Video](https://www.youtube.com/watch?v=tNzwtFeE8HE&t=1929))
- Plan power/ground layers early to avoid rework

3. **Work in Stages**
The course emphasizes:
- Fan out power pins first (use multiple vias for critical nets)
- Do memory interface signals as a group ([Example](https://www.youtube.com/watch?v=nshfdrw9lbc&t=660))
- Leave short "stub" routes from BGA pads to vias - don't fully route until final layout

**Should You Move On?**
Temporarily skip DDR3 if stuck, but return after Lesson 3 (routing fundamentals). The course builds progressively - later lessons about impedance control and length matching will give you missing context for DDR3.

**Recommended Resources from the Course:**
1. [BGA Fanout Deep Dive](https://www.youtube.com/watch?v=tNzwtFeE8HE&t=2388) - Shows how to handle dense via fields
2.

, 07-04-2026, 04:33 PM

[Memory Layout Planning](https://www.youtube.com/watch?v=nshfdrw9lbc&t=452) - Explains component prioritization under BGA
3. [Power Distribution First](https://www.youtube.com/watch?v=nshfdrw9lbc&t=2871) - Why early power planning prevents rework

**Pro Tip:** When stuck, recreate the exact example from the video first (component positions, via sizes, layer assignments). Once that works, modify it for your design. DDR3 requires this level of precision - small mistakes in fanout will cascade into routing nightmares later.

You're experiencing the normal learning curve - push through this hump and the later lessons will feel much easier!

You can continue chatting with the AI Assistant here:
https://fedevel.com/hw-assistant

Robert Feranec , 07-05-2026, 02:34 PM

You can do the simple activities first, that should help. Once you get confidence, you can move to more and more difficult ones. when you start completely from 0 then it may look difficult, but you will figure it out, you just need to try it.

Caner , 07-07-2026, 03:08 PM

EASY: Complete the capacitor layout under the CPU
ADVANCED: Connect the vias to the capacitors located under the CPU. Pay attention to how the vias are arranged in rows to make room for the capacitors.
EXPERT: Place the power fanout decoupling capacitors for the processor. Start from the center of the BGA with the most critical power rails. Locate the ground and power pins and try to visualize where the capacitors should be placed. Position the vias so that there is sufficient space for the components on the bottom side. Don’t forget to place large capacitors close to the pins for the critical power rails.

So, step by step: first I need to place the capacitors relative to the pins, then I need to do the fanout—is that right? Didn’t we usually do the fanout first and then place the capacitors? I want to fully understand the order: should I do the fanout for the power pins first, and then place the capacitors? Is there a complete example of this, perhaps a video?

Robert Feranec , 07-08-2026, 02:15 PM

it is explained in the video. first you just do it somehow to see where the space is, then you move everything away and you do it second time - second time you will do it properly, you will know where to place the capacitors and where to place the vias. The activities are not step-by-step ... each activity is separate project where we removed more and more stuff from the finished PCB.