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mtx4 , 10-30-2025, 07:54 AM

Hi, this is my first post.
I'm working on my first project with DDR3 routing and I started to use xSignals.
Something is not fine for me and I can see differences between my attempt and Robert video on youtube.
For example signals like BA0, BA1, BA2 and ODT are not really divided into PP1 and PP2, I see only a complete track when i select PP1 for example, so I can't do relative matching, Altium keep the total length from FPGA to second memory chip.
Into the video Robert made a matching in ODT signals PP1, but I can't, even if I select the right matching rule.
Now the worst problem, I routed all Adress and ctrl signals, and started to do length matching for PP1 with the relative rule, now I have problems with PP2 because some track result in a total lenght bigger than my target! It is difficult to explane so please look at the screenshot, I want to match A13 to get 18.551 mm as the target A8 but Altium can't do it beacause the signal length of A13 is bigger! But I'm interested only in PP2 part! Why this thing, is a bug? I'm stuck with this work.