can you suggest
Kabaleeswaran , 07-26-2023, 01:11 AM
Hi Everyone,
I am working on Project which consist of following high speed signals DDR ,100E& 90E Differential Pair and 50E ,100E coplanar guide. Board thickness is 2mm (stack up is symmetrical)
one of power Nets maximum amp is 30A, remaining amp are 17A,10A,5A . To meet the power requirement L8 and L9 as 2 OZ copper assigned. can you suggest any one L7 and L10 need to maintain 2 OZ copper or 1OZ copper. based on this I need to get the layer stack up from vendor.
what happen if assigned 1OZ copper in L7 and L10 ? The design has cause any reliability issue ?. IN L8 and L9 most of power need to be accommodate. Kindly suggest any one
@@robertferanec
I am working on Project which consist of following high speed signals DDR ,100E& 90E Differential Pair and 50E ,100E coplanar guide. Board thickness is 2mm (stack up is symmetrical)
one of power Nets maximum amp is 30A, remaining amp are 17A,10A,5A . To meet the power requirement L8 and L9 as 2 OZ copper assigned. can you suggest any one L7 and L10 need to maintain 2 OZ copper or 1OZ copper. based on this I need to get the layer stack up from vendor.
what happen if assigned 1OZ copper in L7 and L10 ? The design has cause any reliability issue ?. IN L8 and L9 most of power need to be accommodate. Kindly suggest any one
@@robertferanec
robertferanec , 08-03-2023, 01:35 AM
I forgot the reason, but PCB manufacturers do not like to use thick copper inside of PCB. Double check with your PCB manufacturer if they will be able to us 2OZ or 1OZ on L7 and L10.
In these situations, often I ended up with copied polygons (the same power polygon) on multiple layers (connected in parallel) and ideally one of them would be on the top or bottom with direct connection between regulator and power pins.
In these situations, often I ended up with copied polygons (the same power polygon) on multiple layers (connected in parallel) and ideally one of them would be on the top or bottom with direct connection between regulator and power pins.
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