Learn High Speed PCB Layout
What will you learn?
You will learn the essential things for High Speed PCB Layout (DDR3, PCIE, SATA, Ethernet, etc.).
About the presenter
Robert has designed number of advanced x86 and ARM processor boards, including Intel i7 and Intel ATOM motherboards.
OCT-28-2015, 9:00am to 5:00pm
Silicon Valley Business Center
Suite 101 1900 Camden Avenue
San Jose, CA 95124
Duration / Number of seats
1 day / maximum 10 people
Price: $149 USD
This course covers the important subjects you need to know for a practical high speed PCB layout:
What you will learn about
- Crosstalk (how to calculate crosstalk)
- Impedance (how to calculate impedance)
- Stackup (how to design stackup, number of layers, layer ordering)
- DDR2 / DDR3 memory layout (how to do memory layout, rules, topology, fanout, pin swapping, length matching, a few words about simulating memory interface)
- Differential pair routing (how to do differential pair routing, recommended rules for PCIE, SATA, GbE, …, length matching)
- 11 The most common high speed design rules (how to route high speed signals, buses, clocks, …)
- How to decide on number of layers and layer ordering
- Testing boards and HW verification
100% Money Back Guaranteed for up to 30-days !
Learn High Speed PCB Layout – Silicon Valley 2015Robert Feranec